DFI Alpha setting.... come in

tictac · § #1 07-15-2004, 03:38 AM

DFI Alpha Setting
bus#0 dev#0 func#1 0ffset#94,95,96,97

if u want to check alpha setting with WPCREDIT plz change it to 32bit mode.....
from left to right :-

- T(DOE) : Selectable Value: 0,1,2,3,4,5,6
- T(RRD) : Selectable Value: 0,1,2,3,4,5,6
- T(W2P) : Selectable Value: 0,1,2,3,4,5,6
- T(W2R) : Selectable Value: 0,1,2,3,4,5,6
- T(REXT) : Selectable Value: 0,1,2,3
- T(R2P) : Selectable Value: 0,1,2,3,4,5,6
- T(R2W): Selectable Value: 0,1,2,3,4,5,6
- Reserved : always 0

try loosen it to 2-3-3-3-3-3-4... or even loosen.. u will gain more stable FSB

Code:

				****************************
				* nVidia nForce2 Data Base *
				****************************

1) AGP  Controller Latency
  *************************
	PCI Bus#0 Dev#30 Func#0 Offset#0D
	
		      0D
	- 16  clock : 10
	- 32  clock : 20
	- 64  clock : 40
	- 96  clock : 60
	- 128 clock : 80
	- 160 clock : A0
	- 192 clock : C0
	- 224 clock : E0
	- 255 clock : FF


2) AGP  Bus Latency
  ******************
	PCI Bus#0 Dev#30 Func#0 Offset#1B
	
		      1B
	- 16  clock : 10
	- 32  clock : 20
	- 64  clock : 40
	- 96  clock : 60
	- 128 clock : 80
	- 160 clock : A0
	- 192 clock : C0
	- 224 clock : E0
	- 255 clock : FF
	
	
3) PCI Latency
  *************
	PCI Bus#0 Dev#8 Func#0 Offset#1B
	
		      1B	
	- 16  clock : 10
	- 32  clock : 20
	- 64  clock : 40
	- 96  clock : 60
	- 128 clock : 80
	- 160 clock : A0
	- 192 clock : C0
	- 224 clock : E0
	- 255 clock : FF
	
	
4) CPU Disconnect Function
  *************************
	PCI Bus#0 Dev#0 Func#0 Offset#6C,6D,6E,6F
	
		    6C 6D 6E 6F
	- Enable  : 01 FF 01 1F/9F
	- Disable : 01 FF 01 8F
	
	
5) Command Per Clock (T1/T2)
  *******************
  	PCI Bus#0 Dev#0 Func#1 Offset#84,85,86,87
	
		    84 85 86 87
	- Enable  : F3 13 0F 03 
	- Disable : F3 13 0F 23 
	
	WARNING! (Not Editable after boot, Can only be set before memory sizing)
	
	
6) Alpha Memory Setting
  **********************
	PCI Bus#0 Dev#0 Func#1 Offset#94,95,96,97
	
		    94 95 96 97
	- T(DOE)  :	     x	Selectable Value: 0,1,2,3,4,5,6
	- T(RRD)  :           x Selectable Value: 0,1,2,3,4,5,6
	- T(W2P)  :       x	Selectable Value: 0,1,2,3,4,5,6
	- T(W2R)  :        x	Selectable Value: 0,1,2,3,4,5,6
	- T(REXT) :    x	Selectable Value: 0,1,2,3
	- T(R2P)  :     x	Selectable Value: 0,1,2,3,4,5,6
	- T(R2W)  : x 		Selectable Value: 0,1,2,3,4,5,6
	- reserved:  -		Selectable Value: -
	
	- Offset 94 = XY
		X= T(R2W)	Selectable Value: 0,1,2,3,4,5,6
		Y= Reserved	-
		
	- Offset 95 = XY
		X= T(REXT)	Selectable Value: 0,1,2,3,
		Y= T(R2P)	Selectable Value: 0,1,2,3,4,5,6
		
	- Offset 96 = XY
		X= T(W2P)	Selectable Value: 0,1,2,3,4,5,6
		Y= T(W2R)	Selectable Value: 0,1,2,3,4,5,6
		
	- Offset 97 = XY
		X= T(DOE)	Selectable Value: 0,1,2,3,4,5,6
		Y= T(RRD)	Selectable Value: 0,1,2,3,4,5,6


7) Normal Memory Setting
  ***********************
  	PCI Bus# Dev# Func# Offset#
  	
  	
  	- T(RAS)	:
  	- T(RCD-Read)	:
  	- T(RCD-Write)	:
  	- T(RP)		:
  	- CAS Latency	:
  	- T(RC)		:
  	- T(RFC)	:


8) Side Band Addressing
  **********************
	PCI Bus#0 Dev#0 Func#0 Offset#49

		    49
	- Enable  : 03
	- Disable : 01

Abducted · § #2 07-15-2004, 05:06 AM

Ah new ways to tweak the bios!!! W00T!!!

Mine says 40 22 53 3
Already quite loose. I'm using d1.0, maybe your tighter timings are from the newer bios version?!
MAYBE that would explain why my board overclocks so much better with d1.0?!
I'll give the other timings a try now

Rabbi · § #3 07-15-2004, 05:11 AM

This is using D10_4247_C18_ED
it uses stock D10bpl and Infinity C18 200FSB ROMSIP on every ROMSIP... as far as I know...
Tictac,
can you tell me if this is CPC ON or CPC OFF please?

Abducted · § #4 07-15-2004, 05:15 AM

Looks like only the first 2 numbers are differend between d1.0 and d2.4.
BTW i just tested by changing the middle numbers to 33 first that all went oke, but changing the first 2 numbers to 23 caused a heavy crash if i may say so

Sound crackling and reboot. I did already change my FSB to 210Mhz so i'll change the first to numbers to what Rabbi has now and see where my max FSB is. (with d2.4 it would be around 228Mhz FSB)

EDIT: hhmm looks like i can't change the first 2 numbers at all. Tried changing it to Rabbi's settings and it crashed again when i tried changing the first 2 numbers. Lets see what happens when i loosen them.

Rabbi · § #5 07-15-2004, 05:20 AM

Looks like it's BPL dependant I think... I'm using D10bpl, Abducted is using D14bpl, and Tictac must be using a later BIOS with 3xxbpl

Abducted · § #6 07-15-2004, 05:25 AM

Quote:

Originally Posted by Rabbi

Looks like it's BPL dependant I think... I'm using D10bpl, Abducted is using D14bpl, and Tictac must be using a later BIOS with 3xxbpl

Ow darn, i didn't read it correctly. I thought u were using d2.4. But the 24 i saw was from the S-ATA bios hehe. hhmm in that case it's probably in the BPL file yes. But still a differend BPL file had a big influence in my system, so maybe tweaking these settings some more will have great results.

Rabbi · § #7 07-15-2004, 05:44 AM

Quote:

Originally Posted by Abducted

...but still a differend BPL file had a big influence in my system, so maybe tweaking these settings some more will have great results...

you n me both Abducted

pity I'm selling this BH5.... hopefully my new Micron memory does well...

Abducted · § #8 07-15-2004, 05:46 AM

? selling the BH-5? Getting that new memory from Crucial? Or do other brands use the micron chips too?

tictac · § #9 07-15-2004, 10:24 AM

Quote:

Originally Posted by Rabbi

This is using D10_4247_C18_ED
it uses stock D10bpl and Infinity C18 200FSB ROMSIP on every ROMSIP... as far as I know...
Tictac,
can you tell me if this is CPC ON or CPC OFF please?

CPC on....

try loosen some timing.... up some more fsb

P_1 · § #10 07-15-2004, 03:07 PM

Rabbi I dont think its the bpl... heres mine using d10_4247_edc18_319bpl cpc on

Rabbi · § #11 07-15-2004, 05:17 PM

Quote:

Originally Posted by Abducted

? selling the BH-5? Getting that new memory from Crucial? Or do other brands use the micron chips too?

I ordered 2x512 Buffalo PC3700 w/Micron 5B-C chips (same chips as OCZ EB) from www.tblmemory.com . I need the money for the ski season... and this memory will go nicely in a future AMD64 hopefully

... I will post results on my NF7-S when it arrives.

Quote:

Originally Posted by Tictac

CPC on....

try loosen some timing.... up some more fsb

I will tonight

... maybe 24hr Prime at 240FSB is possible

... I tried tighting the first (on the left) "30" to a "20" and my PC froze.. but loosening it to a "40" like on Abducted's BIOS worked fine

tedy · § #12 07-15-2004, 05:48 PM

what does this setting do ?

tedy · § #13 07-15-2004, 05:50 PM

rabbi this buffalo memory is cheap !!!! only 110$ for 512 MB W000T !!!

Rabbi · § #14 07-15-2004, 05:59 PM

Quote:

Originally Posted by P_1

Rabbi I dont think its the bpl... heres mine using d10_4247_edc18_319bpl cpc on

either that, or maybe 319bpl and D10bpl have the same Alpha setting. Considering the DFI's use 319bpl, and the best FSB BIOS for the NF7 is the D10 I think this may be something that gives them part of that edge

uwackme · § #15 07-15-2004, 06:34 PM

Heh... the Alpha settings and the AGP controller/bus latency's are even MORE things to be tweaked in the bios....and mod'd permenently.

D10 is behaving but I think getting some of the later bios's to behave during boot before we get to wcprset is gonna be hard....at high FSB that is.

Too bad ABit are such jag-off's.